Plessey demonstrates GaN-on-Si HD monolithic micro-LED display
“This is a momentous milestone in the development of our monolithic micro-LED display technology,” said Plessey director of epitaxy Dr Wei Sin Tan. “To the best of our knowledge this is truly a world first, and we are extremely proud of this achievement.”
The Devon-based fab has been promoting monolithic multi-pixel LED micro displays as the future for outdoor-viewable augmented reality display glasses. “This is what the industry has been waiting for, and opens up a new market for micro-LED emissive display applications,” said Tan.
The firm has worked with silicon backplane maker Jasper Display (JDC) to create this addressable micro-LEDs array using wafer-bonding – bonding which occurs when super-clean and super-flat solid surfaces are bought together, allowing nano-scale fields between the opposing crystal surfaces to form an intimate bond.
“Wafer level bonding poses significant technical challenges and has not previously been achieved between a GaN-on-Si LED wafers and a high-density CMOS backplanes,” according to Plessey. Following what it describes as ‘extensive capital investment in a complete tool set’, “Plessey has succeeded in wafer level bonding of its GaN-on-Silicon monolithic micro-LED wafers with JDC’s eSP70 silicon backplane technology, resulting in micro-LED displays that contain addressable LEDs”.
Plessey achieved a mechanical bond early in April, and has followed this with a mechanical bond with functioning electrical connections – resulting in an operational active matrix display.
There is a video of the micro display in action here – which is worth a look. It is a 1,920×1,080 (full HD) monochrome array of current-driven pixels on an 8μm pitch. “Each display requires more than two million individual electrical bonds to connect the micro-LED pixels to the controlling backplane,” according to Plessey. “The JDC backplane provides independent 10-bit single colour control of each pixel.”
The firm added that: “Bonding a complete LED wafer to a CMOS backplane wafer, incorporates over 100 million micro level bonds between the wafers”, which suggests it is aiming to get 50 displays per wafer.
“Plessey’s monolithic micro-LED array is a great match to JDC’s high-density silicon backplane,” said JDC v-p of product management TI Lin. ” Our JD27E series demonstrates our ability to deliver what our partner Plessey and the wider industry has been waiting for – silicon backplanes that have been designed with their micro-LED display requirements in mind.”
Plessey will present the micro-display at the Society for Information Display’s Display Week, which is on now in San Jose.
Jasper Display is a Taiwanese fab-less chip company, with R&D in Santa Clara.